WHY RULES

Not everything drawable is buildable

the equipment sets the real limits

A layout tool will happily let you draw a wire narrower than a scanner can print, or two shapes closer together than an etch can separate cleanly. Design rules translate the fab's real physical limits, minimum width, minimum spacing, minimum overlap, into constraints a designer's software can check automatically.

A design rule is a fab's manufacturing limit, written down as a number.

DESIGN RULE CHECK

Software checks every shape

What it does Compares every shape in the layout against the fab's rule book

When it runs Continuously during design, and once more before anything is sent to the fab

What a violation means That shape likely won't print, etch, or fill correctly on real silicon

Nothing goes to a mask shop until DRC comes back clean.

HOW MANY MASKS

One chip, dozens of trips through lithography

roughly 30 to 80 masks

Each layer in the FEOL and BEOL flow generally needs its own mask: one for the wells, one for the gate, one for each implant, one for each metal layer, and more. A modern logic chip can need anywhere from about 30 to over 80 separate masks before it's finished.

Every one of those masks has to align precisely with all the others.

MASK COST

Why a mask set is a serious expense

leading-edge masks: well over $100,000 each

An EUV photomask for a leading-edge process can cost well over $100,000, and a full mask set for a modern chip can run into the tens of millions of dollars combined. That cost is fixed once, no matter how many chips get made from it, which is a big part of why very high production volumes matter so much.

Mask cost is spread across every chip a design ever produces.

UNIT 29 STUDY COMPLETE

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Ready for the Fab Challenge?

You've covered the rules a layout must obey, and how many masks a modern chip actually needs.