THE INVERTER

The simplest logic gate there is

one PMOS, one NMOS, one shared gate

Pair an NMOS and a PMOS transistor, tie their gates together as the input, and their drains together as the output. When the input is low, the PMOS pulls the output high; when the input is high, the NMOS pulls it low. That pair is a CMOS inverter, the building block everything else is made from.

Every other logic gate is a variation on this same pull-up, pull-down idea.

BEYOND THE INVERTER

Add transistors, get new gates

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NAND

Two NMOS in series, two PMOS in parallel: output goes low only if both inputs are high

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NOR

The mirror image of NAND, built from the opposite arrangement

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Everything else

Flip-flops, adders, and full processors, all built from these same pairs

A handful of transistor patterns, repeated billions of times, is a whole processor.

STANDARD CELLS

Pre-built, pre-verified logic blocks

a library, not a blank page

Rather than design every gate from scratch, engineers draw from a standard-cell library: pre-designed, pre-verified layouts for an inverter, a NAND, a flip-flop, and dozens of other common gates, each one already checked to work with the process.

A cell library turns 'design a logic gate' into 'pick one off the shelf'.

FROM CELLS TO A CHIP

Placement, then routing

billions of cells, arranged by software

Place-and-route software takes a chip's logic design and arranges standard cells across the die, then routes wiring through the metal stack to connect them. On a modern processor, this software places and connects billions of cells, a scale no human team could do by hand.

The metal stack from the last unit is exactly what carries these connections.

UNIT 28 STUDY COMPLETE

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Ready for the Fab Challenge?

You've covered how paired transistors become an inverter, a NAND gate, and a whole standard-cell library.