STRUCTURE

The layers, from the top

An n-channel MOSFET is built on a p-type silicon body. Two heavily doped n⁺ regions form the source and drain. Between them, a thin oxide separates the gate from the silicon surface, where the channel will form when the gate is on.

Gate, oxide, silicon: the metal-oxide-semiconductor stack that gives the MOSFET its name.

FOUR TERMINALS

Gate, source, drain, body

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Gate

Sets the field that creates or removes the channel

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Source

The reference end: gate voltage is measured against it

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Drain

Collects the current, usually held at a higher voltage in NMOS

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Body

The substrate, usually tied to the source or to ground

Most circuit diagrams tie the body to the source and show three terminals.

THE MATERIALS

What each part is made of

Gate Heavily doped polysilicon, or a metal in modern high-k metal gates

Gate oxide Thermally grown SiO₂, or a high-k dielectric such as HfO₂

Channel A very thin layer of silicon just under the oxide

Source and drain Heavily doped regions, n⁺ for NMOS and p⁺ for PMOS

Body A lightly doped silicon wafer

The oxide interface is the most carefully engineered layer in the device.

SIZE MATTERS

The W/L ratio

I ∝ W / L

The channel length L runs from source to drain, and the width W runs across it. A wider channel carries more current in parallel, and a shorter one adds less resistance. The ratio W/L is the designer's main knob, with L ranging from micrometers in classic devices to tens of nanometers in leading-edge chips.

Wider and shorter means more current, at the same voltages.

TWO FLAVORS

NMOS and PMOS

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NMOS

p-type body, n⁺ source and drain, electron channel. Turns on with a positive gate voltage

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PMOS

n-type body, p⁺ source and drain, hole channel. Turns on with a negative gate voltage

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CMOS

Both kinds on one chip, so almost no current flows when idle

This unit follows the NMOS. The PMOS mirrors it with signs and carriers flipped.

UNIT 3 STUDY COMPLETE

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Ready for the Fab Challenge?

You've covered gate, oxide, source, drain, body, and the NMOS and PMOS pair.