GO BIG

A chip the size of a wafer

Instead of cutting a wafer into hundreds of dies, Cerebras keeps it whole. Its WSE-3 (2024) covers about 46,000 mm², roughly 57 times an H100, with about 4 trillion transistors, 900,000 cores and 44 GB of on-chip SRAM.

If data movement off chip is the problem, make the chip so big that the data never leaves.

HOW IS THAT POSSIBLE?

Living with defects

🛡️

Every wafer has defects, so a wafer-sized chip is never perfect. Cerebras builds in spare cores and routes around the bad ones. Wiring between the reticle-sized fields of the wafer is added across the scribe lines that would normally be cut.

Redundancy turns 'some defects' from fatal into fine.

DATAFLOW

Let the data set the pace

🌊

In a dataflow chip, a model's layers are mapped onto different regions of the chip, and data streams from one region to the next as soon as it is ready. Companies such as SambaNova build reconfigurable dataflow chips; Groq's LPU uses a fixed, compiler-planned schedule with all weights in on-chip SRAM.

Plan every data move ahead of time and you can skip caches and wasted waiting.

WHO'S WHO

Different bets

Cerebras Wafer-scale engine, huge on-chip SRAM

Groq LPU: deterministic, SRAM-only, aimed at fast inference; NVIDIA licensed the technology in a roughly $20 billion deal in December 2025

SambaNova Reconfigurable dataflow units with large memory

Tenstorrent RISC-V cores and a grid of AI tiles, sold as chips and licensed designs

Many start-ups targeted inference, where speed per answer matters most.

THE TRADE-OFFS

SRAM is fast but small

On-chip SRAM is far faster than HBM but holds far less per mm². A model with hundreds of billions of weights may need many SRAM-only chips working together. Each design trades capacity, speed, cost and how easy it is to program.

There is no single best AI chip: each design picks which bottleneck to attack.

UNIT 7 STUDY COMPLETE

🍪

Ready for the Fab Challenge?

You've met chips that use a whole wafer, keep everything in on-chip SRAM, or lay a model out across the silicon.